nblocks:n-dap
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nblocks:n-dap [2019/05/09 11:12] faizan [MCU Features] |
nblocks:n-dap [2020/01/23 06:47] (current) engineer |
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| - | + | ====== n-DAP ====== | |
| - | <WRAP no_pdf hide> | + | ~~CLOSETOC~~ |
| - | *<todo #engineer:2017-10-31>Update n-DAP photo</todo> | + | <WRAP right 220px nblock smaller round :en> |
| - | *<todo #engineer:2017-12-17>Update n-DAP pinout photo: P0.17->P0.22 ADC0; P0.16->P0.12 ADC1; 3.3V->3.3V-OUT; PIN4->5V-FROM-USB-OUT </todo> | + | |
| - | *<todo #engineer:2017-12-17>Move pinout spreadsheet to pcb repository </todo> | + | |
| - | *<todo #engineer:2018-01-02>Add photo of assembled boards </todo> | + | |
| - | *<todo #engineer:2017-12-17>Add block-diagram for CMSIS-DAP programming </todo> | + | |
| - | + | ||
| - | * <todo @Manuel> Review, propose updates </todo> | + | |
| - | * <todo @Nikos> Find and promote capability to be used as DAP for STM32 </todo> | + | |
| - | * <todo @Faizan> Rework and introduce a Template </todo> | + | |
| - | * <todo > New board picture with arrows to buttons, ledes, connector </todo> | + | |
| - | * <todo #faizan:2019-04-26> Move the target programing diagram lower </todo> | + | |
| - | * <todo >Add a picture in perspective </todo> | + | |
| - | + | ||
| - | ~~TODOLIST ns:nblocks:n-dap completed:no~~ | + | |
| - | </WRAP> | + | |
| - | + | ||
| - | + | ||
| - | + | ||
| - | <WRAP right 190px nblock box round :en> | + | |
| <WRAP centeralign>//**n-DAP**// </WRAP> | <WRAP centeralign>//**n-DAP**// </WRAP> | ||
| - | <WRAP centeralign>{{n-dap-v3-orthographic.jpg?100}}</WRAP> | + | {{:nblocks:n-dap-10b.jpg}} |
| <WRAP centeralign>mbed enable board </WRAP> | <WRAP centeralign>mbed enable board </WRAP> | ||
| | License | GPL 2.0 | | | License | GPL 2.0 | | ||
| Line 31: | Line 13: | ||
| </WRAP> | </WRAP> | ||
| - | ====== n-DAP ====== | + | |
| n-DAP is an mbed-enabled development board from the n-Blocks family, with a reduced form factor. | n-DAP is an mbed-enabled development board from the n-Blocks family, with a reduced form factor. | ||
| <WRAP centeralign>{{:nblocks:n-dap-3d.png?400|}}</WRAP> | <WRAP centeralign>{{:nblocks:n-dap-3d.png?400|}}</WRAP> | ||
| Line 40: | Line 22: | ||
| ===DAP interface=== | ===DAP interface=== | ||
| - | The n-DAP [if flashed with a binary image] behaves as a USB to JTAG/SWD bridge between the computer and target's debug access port, using the ARM CMSIS DAP for user friendly programming and debugging. It enables firmware development for n-Blocks boards using the ARM mbed platform and can also be used with industry standard tools such as Keil and IAR. | + | The n-DAP (if flashed with a binary image) behaves as a USB to JTAG/SWD bridge between the computer and target's debug access port, using the ARM CMSIS DAP for user friendly programming and debugging. It enables firmware development for n-Blocks boards using the ARM mbed platform and can also be used with industry standard tools such as Keil and IAR. |
| The CMSIS-DAP Interface Firmware provides: | The CMSIS-DAP Interface Firmware provides: | ||
| Line 53: | Line 35: | ||
| ===== MCU Features ==== | ===== MCU Features ==== | ||
| - | * 2.4 GHz transceiver | + | <WRAP left 600px :en> |
| - | * -96 dBm sensitivity in Bluetooth® Low Energy mode | + | * ARM Cortex-M0 processor |
| - | * Supported data rates: 1 Mbps, 2 Mbps Bluetooth Low Energy mode | + | * 50 MHz max CPU frequency |
| - | * -20 to +4 dBm TX power, configurable in 4 dB steps | + | * Built-in Nested Vectored Interrupt Controller (NVIC) |
| - | * ItemOn-chip balun (single-ended RF) | + | * 128 Kbytes of Flash memory |
| - | * Item5.3 mA peak current in TX (0 dBm) | + | * 12 kB SRAM data memory |
| - | * 5.4 mA peak current in RX | + | * 4 to 32 MHz crystal oscillator |
| - | * RSSI (1 dB resolution) | + | * 12 MHz high-frequency Internal RC oscillator |
| - | * ARM® Cortex®-M4 32-bit processor with FPU, 64 MHz | + | * Internal low-power, low-frequency WatchDog Oscillator |
| - | * 215 EEMBC CoreMark score running from flash memory | + | * 54 GPIOs with configurable pull-up/pull-down resistors |
| - | * 58 μA/MHz running from flash memory | + | </WRAP> |
| - | * 51.6 μA/MHz running from RAM | + | * 8 GPIOs can be selected as edge and level sensitive interrupt sources |
| - | * Data watchpoint and trace (DWT), embedded trace macrocell (ETM), and instrumentation trace macrocell (ITM) | + | * Programmable WatchDog Timer with a dedicated internal WatchDog Oscillator (WDO) |
| - | * Serial wire debug (SWD) | + | * 10-bit ADC |
| - | * Trace port | + | * UART |
| - | * Flexible power management | + | * I2C |
| - | * 1.7 V–3.6 V supply voltage range | + | * USB 2.0 FS |
| - | * Fully automatic LDO and DC/DC regulator system | + | * General purpose Timer (4) |
| - | * Fast wake-up using 64 MHz internal oscillator | + | * Single 3.3 V power supply (1.8 V to 3.6 V) |
| - | * 0.3 μA at 3 V in System OFF mode | + | * Temperature Range: -40 ºC to +85 ºC |
| - | * 0.7 μA at 3 V in System OFF mode with full 64 kB RAM retention | + | |
| - | * 1.9 μA at 3 V in System ON mode, no RAM retention, wake on RTC | + | |
| - | * Memory | + | |
| - | * 512 kB flash/64 kB RAM | + | |
| - | * Unordered List Item256 kB flash/32 kB RAM | + | |
| - | * Nordic SoftDevice ready | + | |
| - | * Support for concurrent multi-protocol | + | |
| - | * Type 2 near field communication (NFC-A) tag with wakeup-on-field and touch-to-pair capabilities | + | |
| - | * 12-bit, 200 ksps ADC - 8 configurable channels with programmable gain | + | |
| - | * 64 level comparator | + | |
| - | * 15 level low power comparator with wakeup from System OFF mode | + | |
| - | * Temperature sensor | + | |
| - | * 32 general purpose I/O pins | + | |
| - | * 3x 4-channel pulse width modulator (PWM) unit with EasyDMA | + | |
| - | * Digital microphone interface (PDM) | + | |
| - | * 5x 32-bit timer with counter mode | + | |
| - | * Up to 3x SPI master/slave with EasyDMA | + | |
| - | * Up to 2x I2C compatible 2-wire master/slave | + | |
| - | * I2S with EasyDMA | + | |
| - | * UART (CTS/RTS) with EasyDMA | + | |
| - | * Programmable peripheral interconnect (PPI) | + | |
| - | * Quadrature decoder (QDEC) | + | |
| - | * AES HW encryption with EasyDMA | + | |
| - | * Autonomous peripheral operation without CPU intervention using PPI and EasyDMA | + | |
| - | * 3x real-time counter (RTC) | + | |
| - | * Single crystal operation | + | |
| - | * Package variants | + | |
| - | * QFN48 package, 6 × 6 mm | + | |
| - | * WLCSP package, 3.0 × 3.2 mm | + | |
| \\ | \\ | ||
nblocks/n-dap.1557414734.txt.gz · Last modified: 2019/05/09 16:12 (external edit)
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